USB Endpoint0 IN OUT wierdness

[drobi001]

Posted on October 06, 2014 at 18:43

I'm having problems with my USB project.  I can get the GET_DESCRIPTOR from my computer and as you can imagine I immediately attempt to send out the descriptor, but it's not going well.

The DIEPT0SIZ immediately decrements to zero.  The DIEPCTL0 disables the endpoint.  I take this as a sign the TxFIFO has received the descriptor.  The problem is on Microsoft Message analyzer it shows the packet doesn't arrive until 6 seconds later, just microseconds before the computer gives up on the endpoint and begins enumeration all over again.  Something else I don't expect is that the transmitted packet shows up in the RxFIFO.  I think the USB core is struggling to understand whether im trying to output or input something, but I cannot figure out where I went wrong.  I am following the reference manual by writing in to the endpoint transmit size then setting the CNAK and enable for IN Endpoint0 control register, then pushing the data onto the 0x50001000 + the address given in the size register.

[tsuneo]

Posted on October 07, 2014 at 11:40

> The problem is on Microsoft Message analyzer it shows the packet doesn't arrive until 6 seconds later, just microseconds before the computer gives up on the endpoint and begins enumeration all over again.

Your Windows host is waiting for completion of the STATUS stage (ie. OUT transaction of EP0), until timeout (around 5 second) occurs. Charge the EP0 OUT endpoint for the STATUS stage. Software sniffers, including MS Event Tracing, doesn’t report each transaction on the bus. They report the start of transfer (ie. a sequence of transactions), and the completion of the transfer. As your control ''transfer'' is hanging on the STATUS stage, after finishing the DATA stage, ''transfer'' completion event doesn’t appear, until timeout occurs. Tsuneo

[drobi001]

Posted on October 12, 2014 at 00:50

''Cha[n]ge the EP0 OUT endpoint for the STATUS stage''

I don't understand how I would accomplish that.  Is there something I can write to the endpoint 0 control register?  Does it take the form of a RxFIFO pop?  How does the endpoint know what stage it is in? Thank you for the helpful reply.

[tsuneo]

Posted on October 12, 2014 at 01:46

>> Charge the EP0 OUT endpoint for the STATUS stage.

>Is there something I can write to the endpoint 0 control register?  Does it take the form of a RxFIFO pop? You've already get the SETUP stage on the EP0 OUT endpoint. In the same way, enable the EP0 OUT for reception, and pop RxFIFO at reception. And then, the EP0 retrieves SETUP stage (ZLP: Zero-Length Packet) from the host.> How does the endpoint know what stage it is in? Your firmware should trace the state, starting from SETUP. Tsuneo