2010-02-05 01:40 AM
Usage exception on return from ext. SRAM
2011-05-17 04:39 AM
I guess the following line cause issue:
0x080004C4 mov r14,pc <---- r14 = 0x080004C8 This mean the LSB of LR is 0. When it is used later0x680000A4 Schedule..:push {r14}
0x680000B0 pop {pc} <---- pc = 0x080004C8The pop think that it try to switch to ARM state. So it fault in the next instruction execution.
Please check the value of the T bit in xPSR to confirm if this is the cause of the problem.2011-05-17 04:39 AM
Thank you for your answer.
Indeed, the problem is that the processor is not in Thumb mode when it executes the pop at 0x0x80004C8. The problem was the following pop 0x680000B0 pop {pc} <---- pc = 0x080004C8This PC does not have B0 set as required.
Thank you very much for your help.