Unexpected timing with nops

[tompa]

Hi,

I am confused with pin toggle timings, why I am getting non equal pulse widths like in the picture, I turn off all compiler optimizations and disable all of the interrupts, code is simple pin toggling. My controller is STM32L431 running on 80MHz.

Thank you very much for any advice!

__disable_irq();
  while(1) {
	  GPIOB->BSRR = GPIO_BSRR_BS15;	
	  __NOP();
	  __NOP();
	  GPIOB->BSRR = GPIO_BSRR_BR15;	
	  __NOP();
	  __NOP();
  }

  

[PGump.1]

Hi,

The while(1) is NOT zero overhead. To prove it, try

__disable_irq();
  while(1) {
	  GPIOB->BSRR = GPIO_BSRR_BS15;	
	  __NOP();
	  __NOP();
	  GPIOB->BSRR = GPIO_BSRR_BR15;	
	  __NOP();
	  __NOP();
	  GPIOB->BSRR = GPIO_BSRR_BS15;	
	  __NOP();
	  __NOP();
	  GPIOB->BSRR = GPIO_BSRR_BR15;	
	  __NOP();
	  __NOP();
  }

I hope that helps.

Kind regards
Pedro

[tompa]

Hi PGump.1

Thank you for your reply, 

unfortunatelly still uneven widths..

[gregstm]

Use a simulator and step through your code at the assembly level, counting the cycles (there should a cycle count visible) - that way you will get to see the "overhead" of the loop. If you want to handcraft a loop with precise timing, you could consider doing it in assembly language.

[PGump.1]

---

@tompa wrote: "unfortunatelly still uneven widths.."

---

I never said it would fix it, it would prove it... Was the proof correct?

Kind regards
Pedro

[STM_Thirty2]

Sampling a Nucleo-746RG @80MHz with a Saleae Logic Pro 8 at 500MS/s

Using the same code as the original post. I did not observe the significant difference in width per the first image of the post.