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Unexpected COMP1 behavior on STM32H723

Linas L
Senior II

Hello,
I need to detect input when it goes over REF/2 (1.65V). I do supply VREF+ pin with 3.3000V.

My signal has offset of 1.2V, and it will go over 2V when I apply signal to it.
Everything is working, but it has unexpected behavior. I can only use negative input as VREF, if I set it to anything else, I get constant 1.

I tested my VREF+ input, and it is 3.3000V ( 0.5% REF chip). Also testes signal on PB0 pin, and it is 1.200 or >2.00V

With debugger I do see BRGEN and SCALEN bits enabled.  But it just does not act as it suppose to. What do I am missing. is Vrefint needs to be enabled? I was unable to find this information... Also I am using LL libs.

COMP_CIRCUIT.PNGREF_DIV.PNG

 

 

 

 

 

 

REGISTERS.PNG

Does any one has experience regarding this ?

void EXTREF_DETECT_Init(void)
{
  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};

  LL_APB4_GRP1_EnableClock(LL_APB4_GRP1_PERIPH_COMP12);
  LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOB);
  LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOC);

  GPIO_InitStruct.Pin = LL_GPIO_PIN_7|LL_GPIO_PIN_8;
  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
  LL_GPIO_Init(GPIOC, &GPIO_InitStruct);

  LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_0, LL_GPIO_MODE_ANALOG);

  LL_COMP_SetPowerMode(COMP1,LL_COMP_POWERMODE_HIGHSPEED);
  LL_COMP_ConfigInputs(COMP1,LL_COMP_INPUT_MINUS_1_2VREFINT,LL_COMP_INPUT_PLUS_IO1);
  LL_COMP_SetInputHysteresis(COMP1,LL_COMP_HYSTERESIS_LOW);

  __IO uint32_t wait_loop_index = 0;
  for(uint32_t startup = 0x1FFFF; startup>0 ; startup--)
  {
    __asm("nop;");
  }

  LL_COMP_Enable(COMP1);
}

RM is so ambiguous about this VREFINT signal....

1 ACCEPTED SOLUTION

Accepted Solutions
Linas L
Senior II

Created a ticket for STM32 engineers and they finally provided clarity on this matter. As it turns out, it uses completely different REF, and it is independent of VREFBUF and external reference. It is an integrated 1.2V reference that could not be changed. This explains why I could not change the voltage level for the comparator. So maximum voltage is indeed 1.2V for this setup.

VREF_ADC.PNG

Only way I can fix this is by adding a resistor divider, where there is no option to do it in the MCU itself

View solution in original post

7 REPLIES 7
Linas L
Senior II

Also added this line, did not helped...

  LL_APB4_GRP1_EnableClock(LL_APB4_GRP1_PERIPH_VREF);
  VREFBUF->CSR= 2;

REFBUF.PNGREFBUF_REG.PNG

AScha.3
Principal III

>RM is so ambiguous about this VREFINT signal....

I dont think so, its obvious to see: VREFINT is the "master" input signal for all other , parts of this VREFINT :

AScha3_1-1704034800566.png

 

+ enable it ? If you expect it working, enable might be a good way...

AScha3_2-1704034907852.png

AScha3_0-1704034508867.png

Enable ENVR , set VRS[2:0] (to 1,5V = 011 ) - test and tell...

 

If you feel a post has answered your question, please click "Accept as Solution".

I am using external reference. DAC is working as it should. I can't use anything else than 3.3V . If I switch to other voltage, I would need to change my hardware, like op amp gain settings, ADC input divider values and so on.

My goal was to get best analog performance possible, hence good maximum voltage reference at the input to maximize SNR in analog domain.

Update:
tested all combinations inside COMP1 and VREFBUF , none of them are working as expected. At this point it looks like error in RM or silicon ? (have 7 boards with same problem, will test it on NUCLEO development board soon) ( i know, it is far fetched. It is always my fault in past experience, just question where...)

Where is no information on ERRATA on this.

Tested on NUCLEO-H723 board and used example for CUBE folder. Connected power supply with multimeter on top of PB0 pin.
And now I was able to test threshold, and is exactly at 1.2V (with COMP_INPUT_MINUS_VREFINT setting). This is why half of my boards are failing or are unstable when VREF is selected, it is so close to that trigger value. And adding hysteresis makes it unresponsive at this setting. So I am at the loss here, whats wrong...

Selecting COMP_INPUT_MINUS_1_2VREFINT I get trigger point of 0.6V. This explains why my setup does not work, my offset is exact of this virtual level of 1.2V (this is coincidence, it's is a LVDS muxer chip TH level generator )

So comparator is working, but Vrefint is at 1.2V? This is not possible by any setting even if I try....

And NUCLEO does use 3.3V just like mine setup

>I am using external reference.

Ok, then you set : vrefbuf pin input mode (HIZ + ENVR 00)

AScha3_2-1704038332950.png

try...

 

 

If you feel a post has answered your question, please click "Accept as Solution".

With debugger, I tried all combinations of registers on REFBUS and COMP, with no effect... Note I have reference driving REF+ pin.

Linas L
Senior II

Created a ticket for STM32 engineers and they finally provided clarity on this matter. As it turns out, it uses completely different REF, and it is independent of VREFBUF and external reference. It is an integrated 1.2V reference that could not be changed. This explains why I could not change the voltage level for the comparator. So maximum voltage is indeed 1.2V for this setup.

VREF_ADC.PNG

Only way I can fix this is by adding a resistor divider, where there is no option to do it in the MCU itself