2020-11-17 06:43 AM
I'm trying to configure Bank 1 of the FMC in Mode 1 (SRAM). I'm nearly there but ran into a frustrating problem, where it insisted on writing 64 bytes despite me setting the FMC's MWID register to 01 (16 bits) and using a uint16_t* in C to perform the write. The reference manual mentions an AXI bus width of 64 bits, and seems to imply that it's configurable somewhere, but I can't find where that might be. On an oscilloscope, I can see that when I try to perform a 16-bit write, chip select goes high and there are four write strobes. If I set MWID to 8 bits, there are eight write strobes. MWID to 32 bits gives two write strobes. Where else besides the BTCR register do I need to configure the FMC's bus width?
Here's my configuration, for reference:
// Zero out all the bits we want to configure (or to be zero)
FMC_Bank1_R->BTCR[0] &= ~(
FMC_BCR1_FMCEN |
FMC_BCR1_BMAP |
FMC_BCR1_WFDIS |
FMC_BCR1_CCLKEN |
FMC_BCRx_CBURSTRW |
FMC_BCRx_CPSIZE |
FMC_BCRx_ASYNCWAIT |
FMC_BCRx_EXTMOD |
FMC_BCRx_WAITEN |
FMC_BCRx_WREN |
FMC_BCRx_BURSTEN |
FMC_BCRx_FACCEN |
FMC_BCRx_MWID |
FMC_BCRx_MTYP |
FMC_BCRx_MUXEN |
FMC_BCRx_MBKEN
);
// Set the bits we want to be non-zero.
FMC_Bank1_R->BTCR[0] |= (
FMC_BCR1_FMCEN | // Enable memory bank 1
FMC_BCRx_MBKEN | // Enable FMC
FMC_BCRx_WREN | // Enable writes
(1 << FMC_BCRx_MWID_Pos) // Set bus width to 16 bits
);
Here's how I'm performing the write:
uint16_t* control_port = (uint16_t*) 0x60000000;
uint16_t data = 0x1234;
control_port[0] = data;
Solved! Go to Solution.
2020-11-17 09:07 AM
2020-11-17 09:07 AM
In MPU, set the FMC address range as Device.
JW
2020-11-17 10:04 AM
Aha, thanks! That seems to be it. For anyone else with the same issue, see this thread.