2013-09-16 11:54 AM
Hello my dear Forumers,
I'm having difficulties to understand the Update Disable bit and Update Request bit.In the peripherial libs it is said, and i quote:Configures the TIMx Update Request Interrupt source. * @param TIMx: where x can be 1, 2, 3, 4, 6 ,7 ,8, 15, 16 or 17 to select the TIM peripheral. * @param TIM_UpdateSource: specifies the Update source. * This parameter can be one of the following values: * @arg TIM_UpdateSource_Regular: Source of update is the counter * overflow/underflow or the setting of UG bit, or an update * generation through the slave mode controller. * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. * @retval None */void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource)and if i set the UDIS bit it says that the Update Event is NOT generated by the timer itself ( counting overflow) but if i MANUALLY set the UG bit i will generate an interrupt?Does this mean that whenever i set the UDIS bit TIM_UpdateDisableConfig(TIM1,ENABLE);and set the UG-BIT with :TIM1->EGR |= 1UL; an interrupt will be generated and the void TIM1_UP_TIM16_IRQHandler() will be called?- Because the IRQ handler isnt executed when active the UDIS-bit.So to sum up. URS-setting : Only the timer itself( over/underflow ) can generate an interrupt UDIS - setting : Only setting the UG-Bit can make an interrupt.Thanks in advance, Martin2013-09-16 01:12 PM
I have run a few tests in the debugger and concluded that:
Interrupts are activated ( the void TIM1_UP_TIM16_IRQHandler() {} is called ) :UR =RESET
UDIS =RESET
- Overload,Underload of TimerYES
-Update Generate bit set in EGR register. (TIM1->EGR |= 1UL;)YES
UR =SET
UDIS =RESET
- Overload,Underload of TimerYES
-Update Generate bit set in EGR register. (TIM1->EGR |= 1UL;)NO
UR =RESET
UDIS =SET
- Overload,Underload of TimerNO
-Update Generate bit set in EGR register. (TIM1->EGR |= 1UL;)NO
PS: Be carefull, in the void TIM_UpdateRequestConfig() function the parameters were switch in my library. By switcht i mean that the values of TIM_UpdateSource_Global and TIM_UpdateSource_Regular were mixed with eachother.Martin