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lightaiyee
lightaiyee
Associate
July 29, 2016
Question

uart baud rate supported by internal 48Mhz oscillator

  • July 29, 2016
  • 2 replies
  • 1219 views
Posted on July 29, 2016 at 04:52

I am using this STM32F0 MCU 

http://www.st.com/content/ccc/resource/technical/document/datasheet/0a/d2/ad/ae/d4/04/44/e3/DM00098745.pdf/files/DM00098745.pdf/jcr:content/translations/en.DM00098745.pdf

It has an internal 48Mhz oscillator. I am thinking of saving material cost by using this internal 48Mhz oscillator and not use an external crystal but I am worried that the uart will not be accurate. I only need to use a baud rate of up to 38.4kbps. Is this internal 48Mhz oscillator good enough for 38.4kbps baud rate?

Another question is what if I am going to use multiple uarts, say up to 4 uarts. Does the accuracy of the oscillator matter in this case? Is it the same whether 1 uart is used or all 4 uarts are going to be used? 

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    2 replies

    Nesrine M_O
    Nesrine M_O
    Associate
    July 29, 2016
    Posted on July 29, 2016 at 10:06

    Hilight.james,

    The Over Sampling feature is available on STM32F0xx family, so depended on this parameter we have:

    •Oversampling by 16: Tx/ Rx baud = fCK / USARTDIV

    •Oversampling by 8: Tx/ Rx baud = 2* fCK / USARTDIV

    fCK is the input clock to the peripheral.

    Refer to Baud rate generation paragraph in your reference manual 

     

    In your case PCLK = 48MHz

    •The Baud Rate must be between 733 Bits/s and 3 MBits/s in case of oversampling by 16

    •The Baud Rate must be between 1.466 KBits/s and 6 MBits/s in case of oversampling by 8

    Refer also to the Tolerance of the USART receiver to clock deviation in your related reference manual 

    -Syrine-

    Tesla DeLorean
    Tesla DeLorean
    Guru
    July 29, 2016
    Posted on July 29, 2016 at 18:38

    The clocks are synchronous, so it isn't going to matter how many USARTs are in use.

    The clock error for baud rates increase as the speed goes up due to the granularity of the clock divider. Serial comms can typically deal with 2-3% speed error without issue. You compute the BRR for the baud rate you want, and then work the math backward to determine what you can actually set, and then quantify that in percentage terms with respect to the ideal setting.

    A 48 MHz APB clock should allow for 3 Mbaud, although async serial at those rates is probably a poor choice.

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