Timer 3 with external clock

[amir_e]

Posted on November 25, 2008 at 04:43

Timer 3 with external clock

[amir_e]

Posted on May 17, 2011 at 12:53

Hi,

I'm trying to configure TIM3 to work with an external clock source through channel 3 - Port B.0. i noticed that when i use the SPI channels which reside on ports A.6 and A.7, this causes TIM3 to upcount. i assume that this phenomena is due to the fact that the SPI ports (ports A.6 and A.7) share the same ports with TIM3 channels 1 and 2. so maybe this affects the counter. is this correct? if so, how can i prevent the SPI to trigger TIM3 upcount?

[jj]

Posted on May 17, 2011 at 12:53

Hi Amir,

Interesting - your findings do not appear on any STM errata. We use the newest, smallest devices but have the same pins/functions available. Awaiting new pcb spin - will experiment & report. If you post your set-up code we can review - is it possible for you to strictly disable the A.6 & A.7 timer function? Like you - we expect that B.0 (Tim3, Ch3) should not be triggered by A.6 & A.7.

[amir_e]

Posted on May 17, 2011 at 12:53

Hi,

find my setting below: =================================================================== TIM_DeInit(TIM3); TIM_ETRClockMode1Config(TIM3,TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted,0x00); /* Select the TIM3 Input Trigger: */ TIM_SelectInputTrigger(TIM3,TIM_TS_TI1FP1); //Set Ch1-3 to input 1 TIM_SelectHallSensor(TIM3,ENABLE); TIM_UpdateDisableConfig(TIM3,ENABLE); TIM_ITConfig(TIM3,TIM_IT_Update,ENABLE); /* Time base configuration */ TIM_TimeBaseStructure.TIM_Period = dw_event_per_count>>2 TIM_TimeBaseStructure.TIM_Prescaler = 3; TIM_TimeBaseStructure.TIM_ClockDivision = 0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);

[jj]

Posted on May 17, 2011 at 12:53

Spent several hours reviewing RM0008 - believe that this is the best (perhaps only) means to invoke only one of multiple functions from a select pin:

/* Enable peripheral clocks ------------------------------------------*/ /* GPIOA, GPIOB and SPI1 clock enable */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_SPI1, ENABLE); You can enable/disable a peripheral via the above mechanism. (SPI1 - shown - which shares PA6,7 with TIM3) Suggest that you disable SPI1 temporarily - and see if the extra counts continue. This should reveal one method of attack. Further: RM0008 - 13.4.2 TIMx_CR2 reveals how you can disable TIM3_CH1. Oddly - there is no way (that I can see) to disable TIM3_CH1 & TIM3_CH2 - you can only disable CH1 and/or CH1, CH2 & CH3! There is a selection marked ''no use'' - I don't grasp this - perhaps you can experiment & report. If disabling SPI1 ''cures'' your issue perhaps you must selectively enable it - possibly disabling TIM3 when SPI1 is enabled. Maybe others have experience and can contribute...