TIM1 update interrupt problem

[keckardt]

Posted on May 07, 2013 at 15:16

I initialized two timers (TIM1 and TIM3) on STM32F100R6 the same way to give an update interrupt. Now it seems both timers run at the same speed, but the update interrupt on TIM1 occurs not that often like TIM3 does. By Interrupt trace I find TIM3 update ISR is called every 5461us (what I expect) while TIM1 ISR is called every 360448us (66 times slower). What am I doing wrong here ?

VOID InitTimer3()

{                NVIC_InitTypeDef        NVIC_InitStructure;     TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;         TIM_DeInit(TIM3);           NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 8;     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;     NVIC_Init(&NVIC_InitStructure);       TIM_TimeBaseStructure.TIM_Period = 0xffff;                   TIM_TimeBaseStructure.TIM_Prescaler = 1;                                                                                 TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;                   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;     TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);             TIM_Cmd(TIM3, ENABLE);

    TIM_ITConfig(TIM3, TIM_IT_Update, ENABLE);  

}

VOID InitTimer1()

{     NVIC_InitTypeDef        NVIC_InitStructure;     TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;         TIM_DeInit(TIM1);             NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_TIM16_IRQn;     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 8;     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;                        NVIC_Init(&NVIC_InitStructure);                          TIM_TimeBaseStructure.TIM_Period = 0xffff;     TIM_TimeBaseStructure.TIM_Prescaler = 1;     TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;                   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;     TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);           TIM_Cmd(TIM1, ENABLE);

    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); 

}

[Tesla DeLorean]

Posted on May 07, 2013 at 17:30

What am I doing wrong here ?

Hard to say, your example isn't sufficiently complete. Be aware that TIM1 and TIM3 are on different APB, so you might want to review the dividers used on the different buses.