there is a delay between caling dcmi_start_dma function and data being actually received in dcmi_dr
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‎2024-01-01 5:37 AM
there is a delay between caling dcmi_start_dma function and data being actually received in dcmi_dr in stm32l4r9discovery the pixel clock is 24 mhz
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STM32L4 series
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‎2024-01-10 4:06 AM
Hello @kanuz_khan ,
If, I have understood your question correctly, yes I confirm, there is an delay between the dcmi_start_dma and the moment when the data are packed into a 32-bit data register (DCMI_DR). This delay depends on:
- VSYNC, HSYNC, PIXCLK
- Software optimization
- Data formats: Monochrome, RGB, YCbCr.......
- Length
- DMA configuration
Thank you.
Kaouthar
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‎2024-01-10 4:06 AM
Hello @kanuz_khan ,
If, I have understood your question correctly, yes I confirm, there is an delay between the dcmi_start_dma and the moment when the data are packed into a 32-bit data register (DCMI_DR). This delay depends on:
- VSYNC, HSYNC, PIXCLK
- Software optimization
- Data formats: Monochrome, RGB, YCbCr.......
- Length
- DMA configuration
Thank you.
Kaouthar
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
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‎2024-03-19 6:50 AM
Hi @kanuz_khan ,
Has your request been answered?
If you need further clarification, please do not hesitate to share it :).
Thank you.
Kaouthar.
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
