the way in which I2C registers work

[M. Jeong]

Posted on October 21, 2016 at 04:17

Could anyone please explain how the STM32 determines the values of TxE, ADDR registers? I'm learning I2C controller of STM32F429 and HAL library. But I couldn't understand the descriptions in reference manual.

1. TxE is 1 when the DR register is empty and 0 when the DR register is not empty. But how does the CPU know if the register is empty? Does it read values directly? 2. In I2C master mode ADDR is 1 when end of address is sent. But here I'm also confused. Does it mean that slave has sent ACK? Thank you 

[ColdWeather]

Posted on October 21, 2016 at 10:21

1. TxE is 1 when the DR register is empty and 0 when the DR register is not empty. But how does the CPU know if the register is empty? Does it read values directly? 

The DR register accepts the data written by the CPU. ''Empty'' does not mean the content of the register but just its readyness to be written by data. TXE bit reflects this readyness. Background: an I2C transmission takes time. The bits of the I2C transfer are shifted out from a DR shadow register. As long as it takes place, any content of the ''visible'' DR register, should it be filled in by the CPU while TXE=1 condition before, cannot be transferred into the ''shadow'' one. For this time TXE = 0.2. In I2C master mode ADDR is 1 when end of address is sent. But here I'm also confused. Does it mean that slave has sent ACK?  Yes, otherwise a error condition occures. It seems, you talk about F1 series? For instance, I2C of F0 has another, - better, - structure. I2C of F1 is a horror.