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T bit confusion

Alex_reynold
Associate III

Hi,
1.As it is mentioned in CM4 user guide and also explained in tutorial, 0th bit of PC is directly loaded to T bit.And CM4 supports only thumb state ISA.To execute/decode instructions in Thumb state 0th bit of PC should be 1 which means PC should always hold address with odd numbers (i.e ODD Locations).
2.But in the attached screenshot,

Top left corner - core register window,
top right side has disassembly window,
Bottom Left-expressions window

3.Actual queries are:
3.1 why PC is holding even address(PC:0x8000654 ). And in disassembly window, address of location from where instruction needs to be executed is also even and it is matching with value in PC which is correct(Current location :0x8000654).
3.2 Once control jumps into generate_interrupt() function[Defined at location 0x80005dc] LR should hold the return address of the function,i.e, location of the next line in main.c function =>printf line(line num in main.c file :148 and disassembly window:0x8000658). So after jumping into function LR should hold 0x8000658,But as shown in snapshot, it holds 0x8000659.
3.3 After bx lr instruction associated with genreate_interrupt() function value in LR should be copied back to PC right but here value as differed by 0x01 why?Screenshot 2025-05-23 141117.pngScreenshot 2025-05-23 141211.png

14 REPLIES 14

Hello @KnarfB ,
COuld you please share the link for pdf

Best regards,
ALEX

Can't share a book :(

Alex_reynold
Associate III

For Cortex M3 @Tesla DeLorean has shared the below link.SO I thought for M4 is also available.

https://wiki.ifsc.edu.br/mediawiki/images/2/29/MIPM3TUG.pdf

The MCU is materially very similar. The M4 adds a couple of instructions, and an optional single-precision FPU (M4F)

Joseph Yiu's books are available commercially on places like Amazon, PDF's are findable if you search effectively

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Thanks guys for support and quick response.@knarfb and @Tesla DeLorean .please close the ticket