We have a batch of custom boards using the STM32H725IGK3 and have experienced several failures getting started with them as the SWD interface appears to be fried. Initially we thought just bad luck with the first couple (inexperienced engineers or ?) but the most recent unit failed after a few successful programming and debugging sessions.
Do these processors need special handling or design considerations ? Our debug header follows previous designs, with Vcc, GND, nRST, SWDIO, SWCLK provided. nRST is gated with a couple other inputs to the MCU while SWDIO and SWCLK just have 100R series resistors to protect possible voltage conflict. So far just default 3v3 supply.
When the boards were working, SWDIO showed Vcc while SWCLK showed 0V before any connections (expected based on internal pullups) while now the pins show about 0.8V until the STLINK/V2 is connected (upon which its pullup/downs take over).
The STLINK pod has been tested and working on a NUCLEO_H723.
It looks like we'll need the MCUs replaced (BGAs, ughh :( but we're not going to get far if they only last a day ...
