STM32WB55RCV6 RAM segments

[mahdi-questat]

Hi

If I understand correctly, this table in the datasheet says WB55RC family which I have a 256K flash type, should allow me to have 128K SRAM 64KB SRAM1 and 64KB SRAM 2

But the code that is generated with STM32CubeMX does not grant me all these sections:

First of all there are two .ld files which I would like to know what are they and how they are used?

One is STM32WB55RCVX_FLASH.ld with the following memory assignment:

MEMORY

{

FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K

RAM1 (xrw) : ORIGIN = 0x20000004, LENGTH = 0xFFFC // which is(64K)

RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K

}

The other one is STM32WB55RCVX_RAM.ld with the following memory assignment:

MEMORY

{

RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K

FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K

}

What do I have to do to have more RAM ?

[Also in the labels that I am expected to assign for the post in the forum, there is no STM32WB family]

[TDK]

The STM32WB55RCV6 is a dual core device. The other core is using the other part of the RAM--you can't use it on the M4 core if you want the M0+ core to work.

[mahdi-questat]

Are you saying the M0+ core is using (128+64)192K ram while I am stuck with 64K ?

[STTwo-32]

Hello @mahdi-questat 

First for your questions on BLE products, you can use the STM32 wireless product forum where you can find the STM32WB label. I will move this post to the concerned forum and I will add the label this time. For the STM32WB memory mapping (FLASH, SRAM1 and SRAM2). It is well explained with details on the part 4.2 of the AN5289.

Best Regards.

STTwo-32