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STM32N6 XIP from OctoFlash does not work depending on AXI-clock

asdfasdf
Associate III

Hi everyone! I'm trying to run the STM32N6 (using the STM32N6570-DK discovery kit) in Execute-in-Place mode. I followed the official tutorial for this, and everything works fine. The tutorial uses very low clock speeds for the CPU and AXI, namely 64 MHz, which is of course way too slow for actually using this. Increasing the CPU clock (SYSA) in CubeMX to 600 MHz works fine. However, as soon as I increase the SYSB clock (AXI) to anything higher than around 120-160 MHz (400 MHz should be maximum?) it stops working completely. Of course I made sure that XSPI2 stays at 50 MHz all the time (because I did not enable the I/O speed optimization for higher XSPI speeds).

Is there anything else that needs to be done in order to use the MCU at its full speed when doing XIP? I also tried a simple FSBL-only project (executing from RAM, so no XIP) and that works fine with 400 MHz SYSB clock. LRUN applications do not work, though, similar to XIP.

Thanks a lot for your help, any tips are appreciated!

Michael

1 ACCEPTED SOLUTION

Accepted Solutions
RomainR.
ST Employee

Hi @asdfasdf 

But are you able to flash/run the official example Template_FSBL_XIP, does it works on your DK board? 

Yes ok, share your OTP fuses setting.

Could you also indicates the STM32N6570-DK revision that you are using and refer to UM3300 in 10.1 Product marking section. 

Best regards,

Romain,

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

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4 REPLIES 4
RomainR.
ST Employee

Hello @asdfasdf 

You should refer to the configuration of your clock tree from the example included in: STM32Cube_FW_N6_V1.1.0\Projects\STM32N6570-DK\Templates\Template_FSBL_XIP\FSBL in stm32n6xx_hal_msp.c

I don't know what is the clock source of your XSPI2 interface you're using, but in the example, you will see that it is done by PLL1 to IC3 (1200MHz) with:

IC3 DIV6 = 200MHz if you have programmed OTP124 bit 15 HSLV_VDDIO3 and also configured bit 26 VDDIO3VRSEL in the PWR_SVMCR3 register for the highest performance.

IC3 DIV24 = 50MHz in limited performance. 

And set your maximum frequency to 600MHz on SYSA and 400MHz on SYSB in the FSBL.

Best regards,

Romain,

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

asdfasdf
Associate III

Hi @RomainR. , thanks for your reply! What you describe is pretty much exactly what I did in order to configure the clocks (using IC3 for XSPI2 running at 50 MHz even though I have HSLV_VDDIO3 blown). Since this does not seem to work, I also tried flashing a compiled binary kindly provided by @B.Montanari here that uses LRUN with a fast SYSB clock, but even that does not work on my board (it works though if I lower SYSB to around 100 MHz, keeping everything else the same).

I'm starting to suspect something might be wrong with my Discovery board, or that this is due to differing OTP fuse configurations. I have not changed anything in this regard but am using the Discovery board exactly in the state I bought it. I postet an Export of my OTP fuse settings as well has exact hardware revisions of the Discovery board in this comment - would you mind having a look at this as well? I'm starting to run out of ideas on how to make this work...

Best, Michael

RomainR.
ST Employee

Hi @asdfasdf 

But are you able to flash/run the official example Template_FSBL_XIP, does it works on your DK board? 

Yes ok, share your OTP fuses setting.

Could you also indicates the STM32N6570-DK revision that you are using and refer to UM3300 in 10.1 Product marking section. 

Best regards,

Romain,

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

asdfasdf
Associate III

Hi @RomainR. ! Thanks for pushing me to try the Template_FSBL_XIP - that one did indeed work! I now also got my main application working, the clock configuration I was using was exactly right, but it seems that one has to enable the XSPI speed optimizations (1.8V voltage range selection, IO compensation cells) even when running the XSPI flash at "just" 50 MHz. To be fair, the reference manual does mention that when running the flash chip at 1.8V (as the DK does) the voltage range has to be set to 1.8V or otherwise "I/Os work in degraded mode".

Thanks again!

Michael