I'm using a STM32L4R9 with a W25G128, using non HAL code. The problem I'm seeing is that auto polling isn't stopped on match per logic analyzer. I have this set up to auto poll for write complete, register 0x05 busy bit 1. The match happens, I clear the flags, but the polling won't stop unless I abort. Any clues for me?
This has errata smell, the sheet says "Automatic status-polling mode with octal memories is not functional" so perhaps this means quad as well?
This basic code structure has been working on the F7, so I think it is somewhat valid.
Other info:
Device at 120mhz, qspi clock prescaler 4, boardMemory->readStat = 0x05, QSPI_PAGEP_POLL_INTERVAL = 1000, SPI_FLASH_WIP = 0x01
void OCTOSPI1_IRQHandler(void) {
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
if (OCTOSPI1->SR & OCTOSPI_SR_TCF) {
OCTOSPI1->FCR = OCTOSPI_FCR_CTCF; //Clear flag
if (qspiAction == QSPI_ACTION_WRITE || qspiAction == QSPI_ACTION_ERASE) {
//Set up auto polling to flag us when device is not busy.
OCTOSPI1->PSMKR = SPI_FLASH_WIP;
OCTOSPI1->PSMAR = 0;
if (qspiAction == QSPI_ACTION_WRITE) {
OCTOSPI1->PIR = QSPI_PAGEP_POLL_INTERVAL;
} else {
OCTOSPI1->PIR = QSPI_ERASE_POLL_INTERVAL;
}
OCTOSPI1->CR |= (OCTOSPI_CR_SMIE | OCTOSPI_CR_PMM | OCTOSPI_CR_APMS);
OCTOSPI1->DLR = 0;
OCTOSPI1->TCR = QSPI_TCR_DCYC(0);
MODIFY_REG(OCTOSPI1->CR, OCTOSPI_CR_FMODE_Msk, QSPI_CR_FMODE_AP);
// OCTOSPI1->IR = boardMemory->readStat;
OCTOSPI1->CCR =
QSPI_CCR_SIOO |
QSPI_CCR_DMODE(QSPI_CCR_4LINES) |
QSPI_CCR_IMODE(QSPI_CCR_4LINES);
OCTOSPI1->IR = boardMemory->readStat;
}
}
if (OCTOSPI1->SR & OCTOSPI_SR_SMF) {
OCTOSPI1->FCR = OCTOSPI_FCR_CSMF;
OCTOSPI1->CR &= ~(OCTOSPI_CR_SMIE);
vTaskNotifyGiveFromISR(xqspiTaskHandle, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
}
