2017-08-28 08:21 AM
Using STM32L496RG, IAR toolset. Application uses both DACs. Recently added IWDG (independent watchdog) to provide overall reset in the event of software errors. DAC's are just used to provide DC levels for trimming, being set up to a constant level in a calibration routine. With IWDG running, the DAC2 output now holds at the correct level for 150us and then rapidly decays, and is periodic doing this at 464us. The watchdog is being refreshed but is not kicking in. All other aspects seem to be running fine.
Are there any hidden interactions between the IWDG and the DAC's? Has anyone used the DACs with IWDG running?
2017-08-28 09:59 AM
Found it....I was using the DAC sample and hold which uses the LSI clock (as does IWDG). Disable the sample and hold and all is fine. Enabling IWDG affects the output of the sample and hold in some subtle way behind the scenes; certainly the output at the pin changes, but I don't need the low power, so disabling the sample and hold restores the DAC output.