STM32L452 with cycle-by-cycle current control possible?

[abaldur]

Hi, can anyone explain to me if it's possible to use the STM32L452 for cycle-by-cycle current control as exemplified in AN4232 p.8-9 and if so, how it's done? I'm asking because I have spent quite some time trying to configure COMP1 to signal the OCREFCLR. As far as I understand, it should be possible to redirect the comparator output internally to the OCREFCLR signal, which is used to clear the PWM signal. The STM32L45xxx reference manual (RM0394 p. 497) writes the following about COMP pins and internal signals: This makes me believe that it is possible. The timer TIM3 is configured as follows:

The COMP1 configuration window looks like this:

How do I configure it to redirect the COMP output?

Best Regards,

Andreas

[waclawek.jan · Accepted solution]

Well, RM0394 is not quite clear in this, but I'd try in TIM1 to set TIM1_OR2.ETRSEL to 0b001 for COMP1 or 0b010 for COMP2 output, TIM1_SMCR.OCCS = 1 to set OCREF_CLR_INT connected to ETRF, and then of course set TIM1_CCMRy.OCxCE to enable the OCxREF clear. It appears that TIM2 has such remap in TIM2_OR2.ETRSEL too, so that is might be a second timer usable for this purpose.

I don't know how to click this in CubeMX.

JW

[abaldur]

Hi JW

Thx for your suggestion. I have now made it work with TIM1 by using your approach. Do anyone know if it is possible to use TIM3 for this purpose?

/ Andreas

[waclawek.jan]

No. Use TIM1 or TIM2.

JW