Hi,
I am using STM32L476VGT3. When ADC1, ADC2 and ADC3 are configured independently, everything works fine. As soon as I write into the DUAL[4:0] bits of register ADC_CCR (common control register) to set ADC1 and ADC2 in dual mode, ADC3 stops. The dual mode itself does not matter; as long as ADC1 and ADC2 are in any of the dual modes, ADC3 will stop.
I found some posts where people had the same problem without a clear answer. One of them says that this was a bug generated by an older version of CubeMX, but I am not using it. It looks like it's the normal behavior of the STM32, despite AN3116 stating that:
"In some devices, there are up to 3 ADCs: ADC1, ADC2 and ADC3. In this case ADC3
always works independently, and is not synchronized with the other ADCs."
Can you please confirm that using ADC1 and ADC2 in dual mode will indeed disable ADC3?
Thanks for your help.
Best regards,
Michel
