2020-09-05 11:21 PM
Hi,
So I have two layer board. I have SDIO connected to SD Card and another SPI to LCD.
My board uses DC-DC (Recom 3.3V) for digital power and LD1117-3.3V for analog power and both with common ground plane. No digital lines cross analog lines. Actually SPI is in upper left corner of the board, SD in upper right corner and all analog inputs are at the bottom of the board and there is no digital lines going down the board as well as no digital 3.,3V going in this area (it only connects SD, CPU). LCD has own LD1117-3.3V LDO.
Even WITHOUT SD and LCD components mounted, whenever I enable SD and SPI I immediately get huge spike in ADC noise.
Without SD/SPI my ADC has around 0.3% noise which I can happily live with - two layer board and I am not an experienced designer. However when I turn on both SD and SPI (again, even without components installed but with traffic going on). I am getting massive 2% noise on ADC.
I also have DAC on I2S (SPI2) which does not affect ADC at all but this one is going at low clock rate around 2MHz.
SPI1 to LCD is working at 44Mhz and I assume this could be a problem.
Any advice on how to filter that, how to deal with that? Any configuration advices or do I need to relayout PCB? I am not an expert on debugging ground plane noise and even do not know how to measure it correctly.
I have excluded SPS noise as I have powered it from battery with same result.
Thank you and kind regards!!!
PS. I used the same design on previous designs with STM32F405 MCU and I didn't have such big problem.
2020-09-06 07:06 AM
Could be a lot of things. Is VREF+ stable?