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STM32H747 dual core read/write to the same SRAM behave strangely

Associate II


I am playing with STM32H747 dual core. I used the example code in DISCO. I am able to bring up the two cores and light up the LEDs from both cores without problem. HSEM also works fine.

Now I am trying to write data to SRAM (0x10000000) from one core and read at the same address from the other core. The code is pretty simple, I just keep alternating the write data between 0x3e and 0x5d with delay in between, and at the other core, jut keep reading from that address with a faster rate than writing. If the read data is 0x3e, light up one LED, and if it is 0x5d, then light up different LED.

What I experimented was that M7-Write/M4-Read is OK (two LED lighted up alternately), while M4-Write/M7-Read only lighted up one LED meaning the read value always stuck at one value (0x3e from my experiment). Furthermore, if I change the address to 0x30040000, both direction only lighted up one LED (read value stuck at one value).

The Reference manual said those SRAMs can be accessed by any bus master, so I'd expected that no matter which direction (M7->SRAM->M4 or the opposite) should alternate the LED. Does anybody know what went wrong in my experiment? Thanks.

Chief II

Maybe cache

Associate II

I think I've found the reason. I am lucky to find another example from Cube-DISCO example code - resource manager, and I found from that code that the SRAM region needs to be set to be sharable as MPU attributes. After done so, it seems the behavior is much more normal. Thanks.