STM32H723 enable icache and dcache disable mpu, hardfault

[zxc]

When we were working on a small batch, we encountered a situation where one of about 100 pcbs would frequently trigger a hardfault. We found that the problem would recur when the cache was enabled. When the mpu was enabled and configured correctly, it would run normally. Only this one MCU had this problem. We determined that this was an individual, low-probability problem. Through experiments, we felt that the default memory attribute of its peripherals was normal, not device, which caused the error when accessing a reserved address during cache.

[Ozone]

Software, as a sequence of instructions, is consistent, and does behave the same every time.

I suspect you have a problem with your power supply, the core clock frequency is at the limit, or both.
Or your PCB has EMI issues.