STM32H723 enable icache and dcache disable mpu: hardfault occurs with one piece among 100.

[zxc]

When we were working on a small batch, we encountered a situation where one of about 100 pcbs would frequently trigger a hardfault. We found that the problem would recur when the cache was enabled. When the mpu was enabled and configured correctly, it would run normally. Only this one MCU had this problem. We determined that this was an individual, low-probability problem. Through experiments, we felt that the default memory attribute of its peripherals was normal, not device, which caused the error when accessing a reserved address during cache.

[Pavel A.]

@zxc I apologize, misinterpreted the subregion disable mask. Indeed the range 0x08000000 is masked by bit 0 of the mask. So... no more ideas.

[mƎALLEm]

It's hard to find the root cause of this kind of issues in the forum.

To me:

- Either there is a quality issue so as I said you need to contact your local FAE  

- Or an issue in your boards: pins/balls not well soldered.

Do you have a way to measure the VCAP voltage level? if yes, measure it and compare to what was provided in the datasheet versus the VOS you are using.

[LCE]

Have you checked all power supplies with a scope and DMM ?

Stable clock source ?

Core voltage supply in the correct range for the internal clock frequency ?

Core voltage supply correctly set and buffered ?

PCB layout, ... - so much that can go / be done wrong.