2024-10-07 07:07 AM
Hi all,
I'm trying to understand what source the STM32H7 (specifically STM32H743) uses for the TPIU trace clock.
According to the RCC chapter there ought to be a multiplexer that allows to choose from a number of sources:
According to the debug chapter, it is derived from the pll1_r_ck (no mention of the other options show above):
Is this clock multiplexer for traceclkin actually implemented, or is it fixed to pll1_r_ck? If this multiplexer is actually implemented, how is it controlled, i.e. which register/bits?
Best Regards,
Dominic
Solved! Go to Solution.
2024-10-15 02:30 AM - edited 2024-10-15 02:32 AM
Indeed, The Clock source is controlled by SW field in RCC_CFGR register. A field common to both System clock and trace clock:
And if the system clock is on PLL1_p trace clock will be on PLL1_r otherwise it will be on HSE, HSI or CSI.
So please mark the solution.
2024-10-07 07:13 AM - edited 2024-10-07 07:26 AM
Hello @drath and welcome to the community.
I'm checking internally and get back to you as soon as I have a feedback (internal ticket number for follow-up 193043)
Thank you for this contribution.
2024-10-14 11:05 PM
I believe I can answer my own question:
The traceclkin switch is controlled by RCC_CFGR[SW]. While that field is documented to switch the system clock (sys_ck), I guess we can assume that this actually switches both sys_ck and traceclkin in parallel. This is what the blockdiagram shows and it matches our observations, even if the RCC_CFGR documentation doesn't explicitly mention it.
Regards,
Dominic
2024-10-15 02:30 AM - edited 2024-10-15 02:32 AM
Indeed, The Clock source is controlled by SW field in RCC_CFGR register. A field common to both System clock and trace clock:
And if the system clock is on PLL1_p trace clock will be on PLL1_r otherwise it will be on HSE, HSI or CSI.
So please mark the solution.