2019-03-07 05:39 AM - edited 2023-11-20 09:33 AM
I am trying to figure out how the FMC of an STM32H7 needs to be configured to work with an FT232H in CPU FIFO mode.
The FT232H requires that for a write operation the NWE signal goes low after the data pins are set:
From what I could find in the reference manual it looks like the STM32H7 FMC sets the WE and data pins at the same time:
So, is there a way to have a delay between the data pin being setup up and the NWE signal going low?
Does anyone have experience with having an STM32 talking to the FT232H via the parallel bus? (UART / SPI is too slow for my application).
2019-03-07 06:33 AM
Can't say I've looked, but you could add several gate-delays into the NWE path externally.