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STM32H7 dual core -- watchdog not firing?

Ray, KF6GPE
Associate II

So, this is a weird one. We're attempting to bring up watchdog timers on both cores of our product.

We're not seeing the CM4 WWDG watchdog fire when we intentionally lock the CM4 in a while loop with no refreshes to the watchdog timer. (I haven't tried the CM7 core yet with similar code).

I understand that each core has a watchdog timer (well, two, the WWDG and the IWDG). Right now to begin with we are enabling the watchdog on only a single core, the CM4 core, like so:

__HAL_RCC_WWDG1_CLK_ENABLE();
 
/* Clear reset flags in any case */
__HAL_RCC_CLEAR_RESET_FLAGS();
 
/* Enable system wide reset */
HAL_RCCEx_WWDGxSysResetConfig(RCC_WWDG1);
 
// These numbers result in a timeout of about 300ms
g_watchDogHandle.Instance = WWDG1;
g_watchDogHandle.Init.Prescaler = WWDG_PRESCALER_128;
    g_watchDogHandle.Init.Counter = 0x7F;
    g_watchDogHandle.Init.Window = 0x7F;
g_watchDogHandle.Init.EWIMode = WWDG_EWI_DISABLE;
 
#ifdef DEBUG
//return;
#endif
 
HAL_WWDG_Init(&g_watchDogHandle);
 

We enter the while loop on one screen of our application, using just a 

while (true) {}

 

I've verified with the debugger that we're both entering the watchdog initialization code, as well as the while loop, and let let it sit for well over ten minutes.

On a lark, I enabled the EWIMode and put a breakpoint in  WWDG_IRQHandler(), and don't see that entered either.

This seems very, very weird. Am I missing something?

1 ACCEPTED SOLUTION

Accepted Solutions
Ray, KF6GPE
Associate II

Thanks to both of you for the suggestions!

It was actually a much dumber mistake on my part --- I was trying to enable the CM7 watchdog on the CM4 core. For the next person on the internet who runs into this, here's some code that works:

	__HAL_RCC_WWDG2_CLK_ENABLE();

	/* Clear reset flags in any case */
	__HAL_RCC_CLEAR_RESET_FLAGS();

	/* Enable system wide reset */
	HAL_RCCEx_WWDGxSysResetConfig(RCC_WWDG2);

	// These numbers result in a timeout of about 300ms
	g_watchDogHandle.Instance		= WWDG2;
	g_watchDogHandle.Init.Prescaler	= WWDG_PRESCALER_128;
        g_watchDogHandle.Init.Counter	= 0x7F;
        g_watchDogHandle.Init.Window	= 0x7F;
	g_watchDogHandle.Init.EWIMode	= WWDG_EWI_DISABLE;

#ifdef DEBUG
	return;
#endif

	HAL_WWDG_Init(&g_watchDogHandle);  

 

View solution in original post

3 REPLIES 3
TDK
Guru

Does the WWDG_CR register indicate that it's active? Is the counter counting down?

If you feel a post has answered your question, please click "Accept as Solution".

What are you doing with the NRST pin?

What's it connected too? Driven High, or driven by some other device or circuit?

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Up vote any posts that you find helpful, it shows what's working..
Ray, KF6GPE
Associate II

Thanks to both of you for the suggestions!

It was actually a much dumber mistake on my part --- I was trying to enable the CM7 watchdog on the CM4 core. For the next person on the internet who runs into this, here's some code that works:

	__HAL_RCC_WWDG2_CLK_ENABLE();

	/* Clear reset flags in any case */
	__HAL_RCC_CLEAR_RESET_FLAGS();

	/* Enable system wide reset */
	HAL_RCCEx_WWDGxSysResetConfig(RCC_WWDG2);

	// These numbers result in a timeout of about 300ms
	g_watchDogHandle.Instance		= WWDG2;
	g_watchDogHandle.Init.Prescaler	= WWDG_PRESCALER_128;
        g_watchDogHandle.Init.Counter	= 0x7F;
        g_watchDogHandle.Init.Window	= 0x7F;
	g_watchDogHandle.Init.EWIMode	= WWDG_EWI_DISABLE;

#ifdef DEBUG
	return;
#endif

	HAL_WWDG_Init(&g_watchDogHandle);