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STM32F7xx Low MIPS issue (Dhrystone Benchmark)

Shrikant Patel
Associate
Posted on August 07, 2017 at 14:45

Hey,

I am using STM32F767ZI development board. I have to run dhrystone benchmark to get the MIPS for my board.

1. I am generating the code using STM32cubeMx  and using MDK-ARM Keil for building and debugging the code.

2. Sysclk frequency = 215 MHz

3. I am getting only 145 MIPS for my board. 

4. I am also using TrueStudio for building and debugging and getting 158 MIPS.

How much MIPS are expected for STM32F7? (I think it is around 400)

What is the issue for getting LOW mpis?

Is there any specific toolchain available for ARM cortex M-7 ?

Is there any specific compiler flags or optimizations for ARM cortex M-7 ?

3 REPLIES 3
Amel NASRI
ST Employee
Posted on August 07, 2017 at 16:43

Hi

shrikant.patel

‌,

The benchmarking scores should reach 462 DMIPS on STM32F7. To get ths high performance level, please refer to

http://www.st.com/content/ccc/resource/technical/document/application_note/0e/53/06/68/ef/2f/4a/cd/DM001697pdf/files/DM001697pdf/jcr:content/translations/en.DM001697pdf

and its associated firmware (

http://www.st.com/content/st_com/en/products/embedded-software/mcus-embedded-software/stm32-embedded-software/stm32cube-expansion-software/x-cube-32f7perf.html

).

-Amel

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Posted on August 07, 2017 at 18:35

>>Is there any specific compiler flags or optimizations for ARM cortex M-7 ?

You can tell GNU compilers the CPU via the command line.

>>What is the issue for getting LOW mpis?

Code not in tightly coupled/cached memory?

Not actually clocking at desired rate?

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Posted on August 08, 2017 at 07:58

Thanks Amel.

I enabled the cache and now i am getting 470 MIPS.

- Shrikant