stm32f746x SPI strange data size

[jvankuilenburg]

Posted on November 12, 2015 at 13:47

I have a problem with the datasize of the SPI of the stm32f746.

When I set the size (DS in CR2) 0111: 8-bit or lower, the spi gives double clock pulses. When I set the size 1000: 9-bit or bigger, the clock pulses are equivalent with the setting of the data size. What should be the problem? The settings are (controlled by reading the regs) : CR1: 0x0074 CR2: 0x1704 I2SCFGR : 0x0000 uint8_t spi_8send(SPI_TypeDef* SPIx, uint8_t data) {    SPIx->DR = data; // write data to be transmitted to the SPI data register        while(1); blocked, for debugging with the scope, then I see 16 clock pulses        while( !(SPIx->SR & SPI_I2S_FLAG_TXE) || (SPIx->SR &SPI_FIFO_FTLVL)); // wait until transmit complete    while( !(SPIx->SR & SPI_I2S_FLAG_RXNE) ); // wait until receive complete    while( SPIx->SR & SPI_I2S_FLAG_BSY ); // wait until SPI is not busy anymore    return SPIx->DR; // return received data from SPI data register }

[stm322399]

Posted on November 12, 2015 at 14:03

According RM0385 chapter 32.5.8 Data transmission and reception, when the size is 8-bit or less, two characters are packed into the 16-bit DR. Using SPIx->DR writes the whole 16-bit, resulting in (almost) the same effect as two 8-bit accesses.

[jvankuilenburg]

Posted on November 26, 2015 at 11:26

Thanks!

It's solved: uint8_t spi_8send(SPI_TypeDef* SPIx, uint8_t data) {    *((volatile uint8_t*)&SPIx->DR) = data; // write data to be transmitted to the SPI data register    while( !(SPIx->SR & SPI_I2S_FLAG_TXE) || (SPIx->SR & SPI_FIFO_FTLVL))  _spi_printstatus(SPIx); // wait until transmit complete    while( !(SPIx->SR & SPI_I2S_FLAG_RXNE) )  _spi_printstatus(SPIx); // wait until receive complete    while( SPIx->SR & SPI_I2S_FLAG_BSY )  _spi_printstatus(SPIx); // wait until SPI is not busy anymore    return SPIx->DR; // return received data from SPI data register }