stm32f427 flash dual bank IAP, random hard faults

[martinchloupek9]

Posted on December 04, 2015 at 15:06

Hello,

I am working on in-application programming of STM32F427, 1MB flash. I have set the DB1M bit in the flash option control register, so the flash memory is organized as two banks of 512 Kbytes each. I am trying to perform read-while-write (RWW) operation - the code executed from the first bank is writing data to the second bank. When I am writing to the second bank, I am experiencing random hard faults on random places in different interrupt handlers (currently, the code writing to flash is blocking). I have investigated some of the faults briefly and it seems like stack corruption or error in fetching code from the flash. For now, the only solution I have found is to disable all interrupts while writing to the second bank. However, this is not good enough for me. In the end, the code writing to the flash should be non-blocking and the interrupts should be enabled. I would be very grateful for any advice.It seems like similar issue to this

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. #stm32f427-iap-dual-bank

[Tesla DeLorean]

Posted on December 05, 2015 at 01:11

I really have no means to replicate any of this.

Make sure the vector table is in the bank you are not writing, make sure none of the entries or handler fall in the bank you are writing. Observe if a vector table in RAM behaves correctly. Turn off the art/cache.

[martinchloupek9]

Posted on December 05, 2015 at 10:39

Hi clive1,

disabling the data cache and pulling data cache reset seems to do the trick.