STM32F427: ADC ERROR (ADC1 = regular + injected) + (ADC2 = injected)

[MaJa90]

Hello,

I want to convert on ADC1 some channels in regular mode all the time. After a last Transfer request DMA2 Stream 0 should write all converted values in a global buffer. I also want to convert four ADC channels synchronous with injeced mode. So I have ADC_Channel_8 and ADC_Channel_3 in ADC1 and ADC_Channel_9 and ADC_Channel_4 in ADC2. An external trigger, should trigger both ADC synchronous and with the DiscMode I would like convert the channels trigger by trigger.

I found out the I have some error on my converted values. So I see a little part of the converted value from ADC_Channel_4 on ADC_Channel_9 (ADC2 injected conversion). If I uncomment the initialisation from the regular ADC1, so I have on ADC1 and ADC2 only injected conversions then the error is on both ADCs.

	/* ADC Common Init */
	ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
	ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div4;
	ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
	ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
	ADC_CommonInit(&ADC_CommonInitStructure);
 
	/* ADC1 regular configuration */
	ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
	ADC_InitStructure.ADC_ScanConvMode = ENABLE;
	ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
	ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
	ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
	ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
	ADC_InitStructure.ADC_NbrOfConversion = 0;
	ADC_Init(ADC1, &ADC_InitStructure);
 
	ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
	ADC_InitStructure.ADC_ScanConvMode = ENABLE;
	ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
	ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
	ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
	ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
	ADC_InitStructure.ADC_NbrOfConversion = 0;
	ADC_Init(ADC2, &ADC_InitStructure);
 
	/* ADC1 regular channels 3, 4 configuration */
//	ADC_RegularChannelConfig(ADC1, ADC_Channel_5 , 1, ADC_SampleTime_28Cycles);
//	ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 2, ADC_SampleTime_28Cycles);
//	ADC_RegularChannelConfig(ADC1, ADC_Channel_7 , 3, ADC_SampleTime_28Cycles);
//	ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 4, ADC_SampleTime_28Cycles);
//	ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 5, ADC_SampleTime_28Cycles);
//	ADC_RegularChannelConfig(ADC1, ADC_Channel_6 , 6, ADC_SampleTime_28Cycles);
//
//	ADC_DMACmd(ADC1, ENABLE);
//	ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
 
	ADC_InjectedSequencerLengthConfig(ADC1, 2);
	ADC_InjectedChannelConfig(ADC1, ADC_Channel_8, 1, ADC_SampleTime_15Cycles);
	ADC_InjectedChannelConfig(ADC1, ADC_Channel_3, 2, ADC_SampleTime_15Cycles);
	ADC_ExternalTrigInjectedConvConfig(ADC1, ADC_ExternalTrigInjecConv_T3_CC4);
	ADC_ExternalTrigInjectedConvEdgeConfig(ADC1, ADC_ExternalTrigInjecConvEdge_RisingFalling);
	ADC_InjectedDiscModeCmd(ADC1, ENABLE);
 
	ADC_InjectedSequencerLengthConfig(ADC2, 2);
	ADC_InjectedChannelConfig(ADC2, ADC_Channel_9, 1, ADC_SampleTime_15Cycles);
	ADC_InjectedChannelConfig(ADC2, ADC_Channel_4, 2, ADC_SampleTime_15Cycles);
	ADC_ExternalTrigInjectedConvConfig(ADC2, ADC_ExternalTrigInjecConv_T3_CC4);
	ADC_ExternalTrigInjectedConvEdgeConfig(ADC2, ADC_ExternalTrigInjecConvEdge_RisingFalling);
	ADC_InjectedDiscModeCmd(ADC2, ENABLE);
 
	/* Enable ADC1 */
	ADC_Cmd(ADC1, ENABLE);
	/* Enable ADC2 */
	ADC_Cmd(ADC2, ENABLE);