STM32F411RE clock configuration

Posted on April 25, 2015 at 17:06

The bypass is used when you have an external source, ie a clock signal, not a crystal.

You can select the settings for the PLL, and it's source clock. You can select the processors source clock, PLL, HSI, HSE. The VCO is an internal clocking source, it can generate pulse at rates >400 MHz the ''Voltage Control'' of the frequency comes from the PLL which tries to discipline the VCO against the input clock at the comparison frequency, typically 1-2 MHz, as divided down by the PLL_M setting.

The DISCO and NUCLEO boards have the ability to take an 8 MHz clock signal generated by the STM32F103 used to run the ST-LINK functionality.

The AHB and APB clocks are derived from the clock you have selected as the core clock. You need to review the Clock Tree diagram in the Reference Manual if the relationship is unclear.

The AHB is a hardware bus, assume the GPIO and MEMORY, the clock enable register should be insightful to what's attached to it. Similarly the APB1 and APB2 peripheral clocks.