2017-01-31 08:20 AM
6.3.13 RCC AHB1 peripheral clock enable in low power mode register
(RCC_AHB1LPENR) Address offset: 0x50 Reset value: 0x0061 900F(gdb) p /x RCC->AHB1LPENR
$6 = 0x61909fThe RM0383 misses GPIOe/H
2017-01-31 09:31 AM
Hi
Bonnes.Uwe
,Again, thanks a lot for yourinteresting contributions .
The highlighted reset value will be corrected in the coming version of the reference manual.
Khouloud.