2025-04-09 6:06 PM
Hi, I have a custom board in which VREF+ is supposed to be 3.3V. But the actual VREF+ (pin32) is 2.xV, with drifts between power ups. VDDA (pin 33) is 3.3V.
What's wrong with the circuit schematic? Can I just remove the resistor (R22) between VREF+ and VDDA? Thanks very much!
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2025-04-11 3:53 AM - edited 2025-04-11 3:58 AM
@TDK noted. That 10K isn't just not helping, it's the opposite of having a cap on the input pin. Yes, you can just remove R22. C47 and C45 should be on AGND not GND. I've seen a lot of negative talk about C63 and splitting AGND from GND in general.
2025-04-10 2:44 AM
Do you use the DAC. At least then you must consider I(VREF+), max 240 uA. 10k in the VREF+ line is no good idea.
2025-04-10 8:11 AM - edited 2025-04-10 8:13 AM
How have you configured the VREFBUF function so that Vref+ is an input? As an input I would expect a 100n to be on the pin side of that 10K resistor.
2025-04-10 6:26 PM - edited 2025-04-10 6:28 PM
The 10 kOhm isn't helping anything here and the best solution would be to short it.
Per the datasheet, VREF+ should have two caps on it. Your design would probably work okay if these caps were present.
@Carl_G There is no VREFBUF on the STM32F4 family. It's always an input.
2025-04-11 3:53 AM - edited 2025-04-11 3:58 AM
@TDK noted. That 10K isn't just not helping, it's the opposite of having a cap on the input pin. Yes, you can just remove R22. C47 and C45 should be on AGND not GND. I've seen a lot of negative talk about C63 and splitting AGND from GND in general.
2025-04-14 8:53 AM
I'm thinking the 10uF is there because of the inductor and thus should probably be placed close to it. C47 near L4. C45 should go near the MCU. And as TDK pointed out you need one more cap by the MCU on VREF+. In this case I'm guessing the new cap should be 1uF.