STM32F407 : IWDG and erase flash sector

[Pablo Devanne]

Posted on March 20, 2017 at 15:53

Hi,

In my application I'm using the Independent watchdog on a STM32F407 with a maximum reload period of 2 ms. During some maintenance operations, we need to save some configuration parameters in flash memory. Even if we use the 16 kB sector, the erase time is greater than 2 ms and the IWDG make the MCU reset. Because there is only on flash bank on the 407 I can't kick the watchdog during the flash erase operation (and the bus stalls anyway), and it is not possible to disable the IWDG.

In order to avoid these resets, I tried to reconfigure the IWDG with a max reload period of a few seconds which is, I measured, way greater than the time needed for the erase operation.

In debug, the registers of the IWDG looks fine after the reconfiguration but when I tried in release or in debug but with no break point near the erase sector routine I have a IWDG reset.

Is there any way to avoid this behavior or am I just not correctly reconfiguring the IWDG ?

Many thanks in advance,

Pablo

[Pablo Devanne]

Posted on March 24, 2017 at 10:42

To completely safe we need to check for PVU and RVU to be reset before writing them.

The following code seems to work :

 while((IWDG->SR & IWDG_SR_RVU != 0) || (IWDG->SR & IWDG_SR_PVU != 0))
 {
 // Continue to kick the dog
 IWDG_ReloadCounter();
 }
 // Unlock register
 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
 // Update configuration
 IWDG_SetReload(reload);
 IWDG_SetPrescaler(prescal);
 // Wait for the new configuration to be taken into account
 while((IWDG->SR & IWDG_SR_RVU != 0) || (IWDG->SR & IWDG_SR_PVU != 0))
 {
 // Continue to kick the dog
 IWDG_ReloadCounter();
 }�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?

Thanks a lot for your answers !