2014-05-31 08:55 AM
2014-05-31 09:20 AM
With DMA of video/sound I'd always double the buffer and ping/pong using HT and TC interrupts so the buffer doesn't get overwritten when you process the preceding data. Toggle a GPIO line.
Observe the periodicity of the GPIO pins for the TIM, and DMA IRQ, like gears on a clock these should all be in sync. Why might you get half the samples? Perhaps the 84+12(8) cycles for the ADC is TOO long? Does it improve if you go to 3+12(8)?2014-06-02 01:34 PM
Thank you for your response clive. I've observed GPIO lines on TIM5 and DMA interrupts. The transfer complete interrupt only change flag with above configuration. GPIO of half transfer interrupt is always low. Frequency of DMA TC interrupt was two times smaller than pixel clock - that's why I've got only half of the pixels. However, I couldn't fix it with 8bit ADC resolution and size of memory and peripheral of one byte.
I've changed ADC resolution to 12b, peripheral and memory size from byte to halfword, FIFO threshold to half full, then half transfer interrupt started. At this stage GPIO of DMA interrupts look fine. There is a mistake in line 22 - should beDMA_MemoryDataSize_Byte;.
Sorry for that.
Problem is with TIM5 interrupt. It toggles, but GPIO line looks like step response with some settling time. I've reduced frame rate, but it looks similar. Do you have idea why it doesn't toggle like square wave?2014-06-02 02:46 PM
Make sure you qualify and clear the TIM5 IRQ before toggling the GPIO pin, and don't use printf()'s or serial IO in interrupts.
void TIM5_IRQHandler(void)
{
if (TIM_GetITStatus(TIM5, TIM_IT_CC2) != RESET) // Qualify
{
TIM_ClearITPendingBit(TIM5, TIM_IT_CC2); // Clear early, to avoid pipeline/write buffer hazard
// Toggle GPIO Here
}
}