STM32F4 - DAC start problem, when using ADC

[smrtkai]

Posted on December 19, 2016 at 11:24

Hi,

I do have some strange behaviour with DAC and ADC on STM32F429I-DISC0. I am using a DAC with DMA. Additionally I use two ADCs in parallel with DMA. Normally it works as expected. But when I have a voltage over 2.5V at one of the ADCs during startup the DAC does not start. Strangely the DAC starts with a voltage of over 2.5V at one of the ADCs but not with the other.

What could be the reason of this behaviour? Do I need to prevent voltages to be higher than 2.5V during startup?

Thanks in advance.

#stm32f4-discovery #adc #dac

[Seb]

Posted on December 19, 2016 at 11:37

The 2.5V is probably coming from something wrong in the application. First, the analog supply pins if available should be well connected. Second, make sure that DAC and ADC DMA are using different streams. What is the DMA trigger transfer source of the DAC? Are the ADC using trigger signal for DMA transfer or just conversion complete? This might help understand a bit more the setup. 

[smrtkai]

Posted on December 19, 2016 at 12:00

The DAC is triggered by 'Timer 6 - Trigger Out event'. The DAC conversion has a frequency of roughly 3.2kHz.

The ADCs are both triggered on 'Timer 1 Capture Compare 1 event' at the falling edge. The ADC conversion has a frequency of roughly 16 kHz. The DMA size is 32 samples.

The 2.5V come from an analog frontend which generates the input signals. The input signals vary in voltage between 0V and 3V.

By the way, what would happen if the voltages become higher or become negative? Is it necessary to prevent that or is the ADC input robust against voltages out of its range?

[Seb]

Posted on December 19, 2016 at 13:24

The signals should remain within the ADC/DAC voltage supply range or it will probably clamp it. How come a 2.5V AFE can generate 3V signals?

ADC/DAC common supply voltage must be less or equal to the MCU main supply voltage.

If the voltage is out of supply range, probably protection diods to the GND and VREF+ would conduct which is out of guaranteed operating spec.

[smrtkai]

Posted on December 19, 2016 at 13:47

The ananlog frontend and the board have a power supply of 5V.

I have tried to change the input pins of the ADC2. But the problem remains the same. If ADC2 has a voltage of 3V at any channel, the DAC does not have any output. If I provide GND to the channels, the DAC has output.

I might just change the ADC but I would like to know the reason of this problem.

[smrtkai]

Posted on December 20, 2016 at 11:42

The problem is somewhere totally different. When there is a voltage of 3V at one of the ADC2 pins, my application runs in the following assertion.

/* Priority grouping: The interrupt controller (NVIC) allows the bits

that define each interrupt's priority to be split between bits that define the interrupt's pre-emption priority bits and bits that define the interrupt's sub-priority. For simplicity all bits must be defined to be pre-emption priority bits. The following assertion will fail if this is not the case (if some bits represent a sub-priority).

If the application only uses CMSIS libraries for interrupt

configuration then the correct setting can be achieved on all Cortex-M devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the scheduler. Note however that some vendor specific peripheral libraries assume a non-zero priority group setting, in which cases using a value of zero will result in unpredicable behaviour. */ configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );