STM32F303 - USART.RXNE behaviour when using RX DMA

raul · ‎2014-07-15

Posted on July 15, 2014 at 17:21

Hi,

I am currently implementing a USART rx driver on an STM32F303xxx using a receive DMA buffer. The motivation to use DMA is to allow reception of bursty high speed (8Mbps) data. [note that using HW flow control doesn't help in this case, due to the latency on the other end to react to those signals, which is several bytes]

Things seem to be working fine, but I am not sure the design is rock solid.

My uncertainty comes from the fact that it is not clear to me what is the behaviour of RXNE when doing RX DMA.

When data is received, I do get a USART2 interrupt, but most of the time, by the time I check RXNE, it is cleared (or was it ever set ?). I am second-guessing that RXNE goes high when receiving the byte, so the CPU enter interrupts, but by the time my ISR executes, the DMA-transfer has lead to RXNE being cleared. Can anybody confirm/deny this ?

If this is the case, how can I guarantee that I will not end-up with stale data in my DMA buffer ? (other than by polling it at regular intervals....)

Thx,

Raul.

#stm32-usart-dma

DiBosco · ‎2014-07-15

Posted on July 15, 2014 at 23:44

The idea is that you set a DMA interrupt when the UART has received a certain number of bytes. That number of bytes is set when you initialise the DMA. If you don't know how many bytes you're going to get you need to ensure you can't overflow the buffer to which you're saving the data. You could check, for example, on a timer interrupt the state of the DMA if you don't know exactly how many bytes you'll receive.

You don't need to concern yourself with the RXNE interrupt at all.

When you say it seems rock sold at the moment, how are you testing that?