STM32F3 Software Interrupt Without Hardware Interrupt

[tyler]

Posted on October 04, 2014 at 01:46

I want to have an interrupt that is triggerable by software, but without also having it be hardware triggerable. This is easy if there is a spare pin on the microcontroller to dedicated to being a useless pin. But what if my design uses every IO connection?

It seems I am required to enable the IMR register to use the SWIER software trigger, but by setting IMR I am unmasking the external interrupt trigger. Is there any way to use the SWIER without also having an external pin that will trigger the same interrupt?Of course an easy solution is to simply use a pin that isn't available on the 48 pin package I am using, but if there is a more ''correct'' solution I'd be curious to know what it is!

[Tesla DeLorean]

Posted on October 04, 2014 at 03:18

Like SVC?

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0179b/ar01s02s07.html

http://falstaff.agner.ch/2013/02/18/cortex-m3-supervisor-call-svc-using-gcc/

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[megahercas6]

Posted on October 04, 2014 at 14:10

/**
* @brief Generates a Software interrupt on selected EXTI line.
* @param EXTI_Line: specifies the EXTI line on which the software interrupt
* will be generated.
* This parameter can be any combination of EXTI_Linex where x can be (0..22)
* @retval None
*/
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->SWIER |= EXTI_Line;
}

[tyler]

Posted on October 07, 2014 at 19:59

I'm just looking to use the NVIC to software trigger a function call which takes advantage of the NVIC nesting features. I might be wrong but this SVC system seems vastly more complicated to implement than what I would like to do.

[tyler]

Posted on October 07, 2014 at 20:00

The SWIER register does indeed work, but only if IER is also enabled. So this solution creates a software-and-hardware interrupt, but not just a software interrupt (unless there is something I'm missing about how to configure the EXTI system).

[waclawek.jan]

Posted on October 08, 2014 at 09:28

Hardware interrupts should not fire if you leave both edge bits in EXTI_RTSR and EXTI_FTSR for the given input cleared.

JW

[Tesla DeLorean]

Posted on October 08, 2014 at 17:12

seems vastly more complicated to implement than what I would like to do.

And your scheme doesn't seem remotely contrived? Nesting code execution via the NVIC? Why don't you use an RTOS with event/semaphore type constructs? Or maintain/manage a list of tasks, and have your SysTick IRQ call the tasks/functions in the order/sequence required?