2016-11-03 06:38 AM
2016-11-03 08:18 AM
Well. What a bit of rubber duck debugging can't fix, heh...
1. The skipped channel was caused since the ADC was written to while ADC_CR2_CAL was on.Fix:/* Power ON */
ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_CAL; ADC2->CR2 = ADC_CR2_ADON | ADC_CR2_CAL; /* Wait 4 ADC cycles, 24 cpu cycles */ timeout = 24; while(timeout--); /* Auto Calibrate */ ADC1->CR2 |= ADC_CR2_CAL; ADC2->CR2 |= ADC_CR2_CAL; while(ADC1->CR2 & ADC_CR2_CAL); while(ADC2->CR2 & ADC_CR2_CAL); // Clear all flags ADC1->SR = 0; ADC2->SR = 0;2. After this, an address misalignment occurred using the DMA. This was caused by setting ADC_CR2_DMA before turning on the DMA channel. This causes an inevitable DMA operation (with CAL results) when turning the DMA channel on.So many little things aren't in the manual...2016-11-03 08:53 AM
So many little things aren't in the manual...
Somehow I suspect a manual that covered all the minutiae of the implementation would be impenetrable, and it is not as if most people read it now anyway..