STM32F103 AT45DB321D SPI issue

Patel.Pritesh · ‎2011-02-25

Posted on February 25, 2011 at 21:40

Tesla DeLorean · ‎2011-05-17

Posted on May 17, 2011 at 14:25

Have you checked any of this on a logic analyzer and verified the timings? Tweaking the clock to resolve the issue seems rather problematic.

One of the most common issues with SPI is using the right mode, the edge the data going out on, and the egde on which the data coming back is valid.

Within the group someone has been using an AT45DB081D-S, but it was on a different ARM platform.

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Patel.Pritesh · ‎2011-05-17

Posted on May 17, 2011 at 14:25

Thanks for the response.

I am waiting for a logic analyzer that I would be receiving this week. I am using SPI in mode-3 which is also default mode for AT45DB321D. I tried to bump up the peripheral and SPI clock to see what happens. At PCLK2 = 72Mhz, SPI worked for 36 & 18 Mhz clock but failed for 9Mhz.

What I am not able to get is, this only happens if status register is polled while flash is in page write period and SPI clock is less than 12Mhz.