STM32F100R PB5 not enabling internal pull-up?

[Joe Grisso]

Posted on September 02, 2014 at 16:54

Hello All,

I've been bringing up some new hardware around an STM32F100RBT6 processor, and was planning on using PB5 as an input with an internal pull-up enabled. For some reason, none of my boards will enable the internal pull-up on PB5. I've resorted to using an external pull-up for now, but I was wondering if there were any ideas from the community at large? I see there are some errata when using PB5 as an AFIO with other peripherals, but not with using PB5 as GPIO. Here's the specific code I'm using to enable the input: GPIO_StructInit(&GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; GPIO_Init(GPIOB, &GPIO_InitStructure);I'm using V3.5.0 of the STM32F10x standard peripheral library, and the Launchpad toolchain. Thanks!

[Tesla DeLorean]

Posted on September 02, 2014 at 17:50

I don't have any insight into your design/implementation. PB5 is not a Five Volt Tolerant pin, so I'd watch that, and look at my supply pins for the IO, and other connectivity, intentional, or otherwise, on the pin/board.

[Joe Grisso]

Posted on September 02, 2014 at 18:57

Hi Clive,

Thanks for the quick reply. Your support as always is excellent! This is a simple NO tact switch that shorts the pin to ground when pressed, but leaves the pin floating otherwise. I've done all the basic hardware tests - VCC/VDD check on all pins, continuity from switch to IC pin, ensuring the pin isn't shorted to ground, etc. Even more perplexing is that I have several other I/Os on PORTA that work just fine in this configuration - all going to tact switches. If it makes a difference, I *am* using TIM3, but only internally.I'm only bringing up other peripherals because the errata mentions them as potential conflicts.Thanks!

[Tesla DeLorean]

Posted on September 02, 2014 at 21:30

On a VL-Discovery (STM32F100RBT6) board setting up just PB5 in either IPD or IPU mode seems to drive the pin as expected.