Posted on December 12, 2014 at 08:53I am migrating code from STM3210x to STM32F0xx. major part of the application uses spi interface. I see in logic analyzer each bursts of 16bit clocks. while I expect it to be 8bit clock for each byte and a delay of one byte between the clocks. I am attaching the signals.
inside attachments you can so how its initialized and the outcome.
Can someone suggest how to get the same signaling in STM32F0 to be like the STM32F10 ?
I have tried using SPI_Senddata8, change the SPI_InitStructure.SPI_DataSize with no success.
The code I am using is as folow:
SPIx_CS_GPIO->BRR = SPIx_CS;
for(i=0; i<headerLength; i++)
{
SPIx->DR = headerBuffer[i];
while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
temp = SPIx->DR ;
}
for(i=0; i<readlength; i++)
{
SPIx->DR = 0;
while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
readBuffer[i] = SPIx->DR ;//port_SPIx_receive_data(); //this clears RXNE bit
}
SPIx_CS_GPIO->BSRR = SPIx_CS;
Thanks,
Roy
#stm32f0
