STM32 USB endpoint configuration (clarification questions)

dmatheis2 · ‎2011-10-06

Posted on October 06, 2011 at 13:13

Hi,

I started to modify the CustomHID example of the ST USB Lib V3.3 to get it running on my Olimex STM32-P103 evaluation board. I want to use this firmware to start developing a PC controlled board without the need to install an extra driver on a PC (no admin rights). I am stuck at the USB endpoint buffer configuration in usb_conf.h. I hope someone of you could give me a little explanation.

#define BTABLE_ADDRESS (0x00)

#define ENDP0_RXADDR (0x18)

#define ENDP0_TXADDR (0x58)

#define ENDP1_TXADDR (0x100)

#define ENDP1_RXADDR (0x104)

So my questions regarding these defines:

Is BTABLE_ADDRESS the start address of the PMA buffer (packet memory area) which is dedicated to USB? If so, is there any good reason not to start with address 0x00?

Why is EP0RX starting at 0x18 and not at BTABLE_ADDRESS? Is the space needed for some data (which one?) and how is the address of 0x18 calculated?

In the file usb_prop.c EP0Rx is configured with a buffer size of 64 bytes (Function SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); ) so the EP0Tx has to start at 0x58.

Why is the EP1Tx bufferspace starting at 0x100 and not at 0x98?

CustomHID_Reset does call SetEPRxCount and configures EP0Rx but not Tx, is it also configured?

Edit: I have an additional question. Where in the USB examples files are the USB data lines configured? I couldn't find any file with initialisation of PA11 and PA12 pin as alternate function pins.

mattgczapar · ‎2011-10-07

Posted on October 07, 2011 at 14:56

PA11 and PA12 aren't configured to alternative functions, because that is done for you. From the STM32fxxx Reference Manual:

''USB_DM / USB_DP: As soon as the USB is enabled, these pins are connected to the USB

internal transceiver automatically''

dmatheis2 · ‎2011-10-11

Posted on October 11, 2011 at 11:25

Hi The Boat,

thank you for your reply. To the others you can find the statement under Table 29 USB in the reference manual (Doc ID 13902 Rev 13 Page 163/1093). So one of my questions was settled. Thank you ;)

jzawadzk · ‎2011-10-13

Posted on October 14, 2011 at 01:18

As for your other question: packet memory is also used to store buffer description table. Depending on number and type of used endpoints you need to reserve enough space, for example:

PMAAddr + BASEADDR_BTABLE + 0x00000000 : EP0_TX_ADDR

PMAAddr + BASEADDR_BTABLE + 0x00000002 : EP0_TX_COUNT

PMAAddr + BASEADDR_BTABLE + 0x00000004 : EP0_RX_ADDR

PMAAddr + BASEADDR_BTABLE + 0x00000006 : EP0_RX_COUNT

PMAAddr + BASEADDR_BTABLE + 0x00000008 : EP1_TX_ADDR

PMAAddr + BASEADDR_BTABLE + 0x0000000A : EP1_TX_COUNT

PMAAddr + BASEADDR_BTABLE + 0x0000000C : EP1_RX_ADDR

PMAAddr + BASEADDR_BTABLE + 0x0000000E : EP1_RX_COUNT

PMAAddr + BASEADDR_BTABLE + 0x00000010 : EP2_TX_ADDR

PMAAddr + BASEADDR_BTABLE + 0x00000012 : EP2_TX_COUNT

PMAAddr + BASEADDR_BTABLE + 0x00000014 : EP2_RX_ADDR

PMAAddr + BASEADDR_BTABLE + 0x00000016 : EP2_RX_COUNT

and in such case we get 0x18 address for endpoint 0 transmission buffer.

You can find more details in the reference manual p 600

dmatheis2 · ‎2011-10-19

Posted on October 19, 2011 at 17:48

Ok,

in the ''Custom HID example'' only EP0 (Tx, Rx, max. size 0x40 = 64 Bytes) and EP1 (Tx, Rx, max size 2 Bystes) are used, so it should be possible to start with EP0 at BTABLE address 0x10 (4x Addr and Count register entries = 16 Bytes = 0x10) and not 0x18? Why is there a gap between EP0 ( ENDP0_TXADDR (0x58)) and EP1 ENDP1_TXADDR (0x100) buffer starting address table entries?

On page 600 I have read this hint : ''Each table entry is associated to an endpoint register and it is composed of four 16-bit words so that table start address must always be aligned to an 8-byte boundary (the lowest three bits of USB_BTABLE register are always “000�?).'' So I have to bear in mind this address masking not only for the BTABLE start address but also for the endpoint buffer start addresses?!