STM32(G4) SPI, Hardware NSS with NSSP-Diabled does not work, only with NSSP-Enabled. What is the issue?

[seppeltronics_v]

Hello,

the SPI does work with NSSP(Negative Slave Select Pulse-Mode), but it does not work if I disable NSSP. As someone pointed out the SPI NSS(P) may only work if the Pulldown of that pin is enabled, but I’m not 100% sure on that one, but it seems to wirk for NSSP-En that way. For NSSP-Disabled I could not get the SPI-Controller to control the NSS(CS).

I observed two issues:

1) On Reset the NSS(CS) is low and will stay low until the first SPI Transaction. I tried to set it via HAL_GPIO_WritePin( … , GPIO_PIN_SET); but that has no effect, maybe because the Pin is controlles by the SPI-HW.

2) Is the serious issue is, if I disable the NSSP, the CS does not work at all.

How can I make the Hardware NSS work with NSSP disabled?

Thanks a lot, Best Regards, Seppel

P.S.

This is the Setup and Waverforms for the NSSP-Disabled, I have a 2s delay on startup, which you can see on the scope-pictures.:

 

This is the setup for the NSSP Enabled, the same was used for NSSP-Disabled(only that NSSP was set to disable. ,I have a 2s delay on startup, which you can see on the scope-pictures.:

[LHarm.1]

I am seeing the same issue. I am using a NucleoG474RE. Did you ever find a solution?

[hmcb]

I am also having this issue using NucleoG474RE.
Hardware NSS works exactly as expected when NSSP=1 with a pulse between each word, but when NSSP=0, NSS is held low continuously.

Has anyone found a solution yet?

[Herm]

Hardware NSS is basically useless in master mode. It is always low while the SPI interface is enabled. I found it much easier and more reliable to just control the NSS pin via a normal GPIO pin.

Here is the relevant quote from the G474 manual (section 39.5.5):

---

The NSS signal is driven low as soon as the SPI is enabled in master mode (SPE=1), and is kept
low until the SPI is disabled (SPE =0).

[AMacd.1]

I know, late to the party but if you are just dealing with a single master and slave combination, the hardware NSS does work if you consider the following points:

• In the HAL_SPI_xxCpltCallback function, you need to call __HAL_SPI_DISABLE(hspi) to allow the NSS pin to be released.
• You must make sure that, in CubeMX's GPIO settings for the NSS pin, the pullup is enabled (or add an external pullup resistor on your board). Otherwise, the NSS line just floats when disabled and if you hook up any kind of instrument to the pin (like a scope or logic analyzer), it'll go low. To quote from page 1341 of rm0394, "If SPI is disabled the SPI peripheral is disconnected from GPIO logic, so the levels at these lines depends on GPIO setting exclusively."
• By the way, NSSP mode only works if CPHA = 0!  So, if you need NSS to go high around each byte in SPI Mode 3 (i.e. CPHA=1, CPOL=1), you're s##t out of luck.

After I figured out all this, I do have to agree that the hardware NSS isn't all that useful - especially if you need to access multiple slaves on the bus (which SPI is supposed to be anyway).

Just my 2 cents!

Cheers
Allan