Posted on May 17, 2011 at 13:59Can the polling loop for PLLCLK be dropped?
Yes, you can do this, but you should know, that this can have unwanted effects on timers, peripheral devices, etc.
This devices need a fixed time base!
Better way is:
- enable external clock and pll (but don't switch)
- running with old timer an peripheral configuration
- get the hse/pll ready interrupt/event
- switch the sysclk-source and change the configuration of timers, peripherals, etc. (in this phase, they should not be used!)
