2023-05-02 07:52 AM - edited 2023-11-20 06:40 AM
2023-05-02 11:16 AM
I suspect the problem here:
NVIC->ISER =
NVIC->IP[...] =
This definitely doesn't do what you think. IP registers are accessed as 32 bits, and a single register contains 4 priorities for 4 interrupts.
Use NVIC_EnableIRQ() and NVIC_SetPriority() instead of your home-made code.
2023-05-02 01:49 PM
Don't use the TIMx->SR &= forms, use TIMx->SR = mask, it clears the interrupt and is safe
If the interrupt doesn't clear properly it will reenter/saturate, but that doesn't look to be the issue here.