Posted on January 31, 2012 at 17:061). SPI. Well, you can have always the same procedure to send via SPI in interrupt mode: ALL bytes to send in the ISR; the ''main'' procedure just prepares the buffer, inits counters/pointers and just enables the SPI interrupt. At this moment, due to the fact, that TXE is active, ISR triggers immediately, you send the first byte there, move pointers/reduce counters, and if there are still data to send, exit the ISR, else (was a single byte only) disable the SPI TXE interrupt first. That's all.
But please remember: I suppose, you have to control the chip select (some GPIO) output to mark the beginning and the end of the SPI transaction to let the peripheral to latch the received data. So, the STM32F10x has double buffered SPI. It means, after the last byte has been written to DR, TXE goes high almost immediately, but the data are still clocked out. Thus you should wait for BSY flag reset before you play with the chip select.
I did not understand, what you meant saying ''disable interrupts entirely''... You work just with SPI TXEIE bit (and NVIC corresponding to your SPI, of course) but not with global interrupts.
2). To have EXTI active, you should take a look at TWO units in STM32F: not only EXTI but AFIO, too. Saying nothing of RCC, naturally, to clock all of them.
