2017-05-23 03:35 AM
I am working with 2 stm32f4-discovery development boards, one is an SPI master and the other is an SPI slave. My packet size is larger than 2 bytes so I am forced to use DMA controllers. My slave has a buffer, called transmitBuffer, with data to be transferred to the master and this gets assigned to DMA1_Stream4->M0AR:
uint8_t transmitDMAbuffer[4] = {0, 1, 2, 3};
DMA1_Stream4->M0AR = (uint32_t) transmitDMAbuffer;
Now, what if I change my mind and want to transmit the following instead:
transmitDMAbuffer[0] = 4;
transmitDMAbuffer[1] = 5;
transmitDMAbuffer[2] = 6;
transmitDMAbuffer[3] = 7;
How do I then tell the DMA controller to refresh the data in its 'cache' (I am running without the FIFO)? If I change the data like above and don't inform the DMA controller about the new data, then it will transmit 0, 1, 6, 7 to the master.