Posted on May 17, 2011 at 13:41Hi Beat,
if master continuously sends clock while nSS line is down, the STM32 peripheral will send last data in the buffer, however reporting underflow. You cannot avoid this as it's a nature of SPI transmission.
Another question is, how to sync the frames. You shall in such case keep the nSS line down during transmission, and rise it up between the frames. It will re-synchronize the slave on the SPI bus.
Another question is, if you use this signaling from the master to STM32.
