SPI SD crc7

[hazelnusse]

Posted on May 12, 2012 at 00:44

I would like to use the SPI CRC capabilities to generate the CRC7 byte for a SD SPI command frame.  The command frame is 6 bytes long, with the final CRC byte structure as follows:

CRC[7:1] -- CRC7 of first 5 bytes of command frameCRC[0] -- 1The generator polynomial for CRC7 is:G(x) = x^7 + x^3 + x^0The part I'm having trouble with is how to get the resulting CRC7 to be shifted to the left by one bit, and have the 0 bit set before the SPI sends out the CRC byte.  As it is, it seems to just calculate the CRC7 and leave it in the low 7 bits.Is there a way to change the CRC polynomial so it will effectively shift the generated CRC over 1 bit and set the 0 bit? 

[Tesla DeLorean]

Posted on May 12, 2012 at 16:38

I don't see the mechanics of this working out.

A byte or nibble table method would be quite effective if speed is critical.

[hazelnusse]

Posted on May 13, 2012 at 01:11

I have implemented a byte table that works, but I would like to take advantage of the hardware, if possible.

I agree, the mechanics of manually left shifting by one and then setting the low bit seems impossible given the way the SPI CRC operates.What about the possibility of a different CRC polynomial that has the same effect?  I don't understand the math behind CRC calculations, perhaps if I did it might be obvious that this is or is not possible.

[Tesla DeLorean]

Posted on May 13, 2012 at 04:06

I've implemented other CRC polynomials in silicon, and I don't see a simple way of getting this to work if the shift direction, data bit and feed back terms don't all align properly.

The most obvious hack would be to try the 0x13 polynomial value instead of 0x09, but my gut feeling as that won't get the job done. If you have a couple of example data sets + CRC7, I'll take a look at those. From a math perspective think of the CRC as a remainder to a long division.